Method and apparatus for reducing delay in a bus provided from parallel, capacitively coupled transmission lines

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United States of America Patent

PATENT NO 7400276
SERIAL NO

10351811

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Abstract

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A mechanism for use with a bus provided from parallel, capacitively-coupled bus lines to restrict a number of possible transitions on the bus to a number that is smaller than the maximum number of possible transitions so that data transmissions on the bus occur at a transmission rate which is higher than the transmission rate allowable if the number of transitions had not been restricted.

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Patent Owner(s)

Patent OwnerAddress
MASSACHUSETTS INSTITUTE OF TECHNOLOGY77 MASSACHUSETTS AVENUE CAMBRIDGE MA 02139

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chandrakasan, Anantha Belmont, MA 26 853
Sotiriadis, Paul P Baltimore, MD 1 77

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