Systems for erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells
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United States of America Patent
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Jul 15, 2008
Grant Date -
Oct 5, 2006
app pub date -
Dec 6, 2005
filing date -
Mar 31, 2005
priority date (Note) -
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Abstract
A set of non-volatile storage elements is divided into subsets for erasing in order to avoid over-erasing faster erasing storage elements. The entire set of elements is erased until a first subset of the set of elements is verified as erased. The first subset can include the faster erasing cells. Verifying the first subset includes excluding a second subset from verification. After the first subset is verified as erased, they are inhibited from erasing while the second subset is further erased. The set of elements is verified as erased when the second subset is verified as erased. Verifying that the set of elements is erased can include excluding the first subset from verification or verifying both the first and second subsets together. Different step sizes are used, depending on which subset is being erased and verified in order to more efficiently and accurately erase the set of elements.
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