
US Patent No: 7,402,454
Number of patents in Portfolio can not be more than 2000
Molded integrated circuit package with exposed active area
Stats
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Jul 22, 2008
Issued date -
Dec 14, 2006
filing date -
11/638,853
serial no -
In Force
status
Importance
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Abstract
An integrated circuit die having an active area that must remain exposed after packaging is secured by a compliant die attachment by which the integrated circuit die is held in position within a transfer mold during encapsulation. The compliant die attachment may comprise a flexible, compressible tape having pressure-sensitive adhesive, alone or with a rigid substrate support, or a compliant adhesive preferably applied only around a periphery of the die attach area. Deformation of the compliant die attachment under mold clamping pressure allows complete contact of the mold with the active area, preventing bleeding of the encapsulating material under the edge of a mold portion onto the active area.
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First Claim
Related Publications
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International Classification(s)
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- [Patents Count]
Cited Art
| Patent Info | (Count) | # Cites | Year |
|---|---|---|---|
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| 5,948,991 Semiconductor physical quantity sensor device having semiconductor sensor chip integrated with semiconductor circuit chip | 47 | 1997 | |
| 6,300,155 Method for producing semiconductor device by coating | 6 | 2000 | |
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| 4,894,707 Semiconductor device having a light transparent window and a method of producing same | 44 | 1988 | |
| 5,424,249 Method of making mold-packaged pressure sensing semiconductor device | 28 | 1993 | |
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| 6,395,585 Method for housing sensors in a package | 17 | 2001 | |
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| 5,897,338 Method for encapsulating an integrated semi-conductor circuit | 108 | 1997 | |
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| 5,644,169 Mold and method for manufacturing a package for a semiconductor chip and the package manufactured thereby | 142 | 1996 | |
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| 6,734,544 Integrated circuit package | 5 | 2003 | |
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| 5,622,873 Process for manufacturing a resin molded image pick-up semiconductor chip having a window | 39 | 1995 | |
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| 6,667,439 Integrated circuit package including opening exposing portion of an IC | 23 | 2001 | |
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| 6,097,098 Die interconnections using intermediate connection elements secured to the die face | 59 | 1997 | |
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| 5,422,163 Flexible substrate with projections to block resin flow | 24 | 1993 | |
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| 6,160,526 IC module and IC card | 55 | 1999 | |
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| 6,489,178 Method of fabricating a molded package for micromechanical devices | 68 | 2001 | |
Patent Citation Ranking
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Jan 22, 2016 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Jan 22, 2020 |
| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge - 7.5 year - Late payment within 6 months | $160.00 | $80.00 | $40.00 |
| Surcharge - 11.5 year - Late payment within 6 months | $160.00 | $80.00 | $40.00 |
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |