Semiconductor memory device, page buffer resource assigning method and circuit therefor, computer system and mobile electronic device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7405974
APP PUB NO 20040268027A1
SERIAL NO

10848324

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Abstract

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A semiconductor memory device includes a page buffer circuit and an arrangement of memory elements each including: a gate electrode provided on a semiconductor layer with an intervening gate insulating film; a channel region provided beneath the gate electrode; a diffusion area provided on both sides of the channel region, having an opposite polarity to the channel region; and a memory functioning member provided on both sides of the gate electrodes, having a function of storing electric charge. The page buffer circuit provides a common resource shared between a memory array controller and a user. The page buffer circuit has two planes containing random access memory arrays. The page buffer circuit also includes a mode control section to facilitate access to the planes over a main bus in user mode and access to the planes by the memory array controller in memory control mode.

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Patent Owner(s)

Patent OwnerAddress
SHARP KABUSHIKI KAISHASAKAI-KU SAKAI-SHI OSAKA 590-8522

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Iwase, Yasuaki Tenri, JP 61 775
Iwata, Hiroshi Nara, JP 354 5885
Morikawa, Yoshinao Ikoma, JP 59 815
Nawaki, Masaru Nara, JP 49 827
Shibata, Akihide Nara, JP 109 1758
Yaoi, Yoshifumi Yamatokoriyama, JP 35 772

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