Instructions to load and store containing words in a computer system emulator with host word size larger than that of emulated machine
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jul 29, 2008
Grant Date -
Jul 13, 2006
app pub date -
Dec 7, 2004
filing date -
Dec 7, 2004
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Two unique instructions for the instruction set of a target 36-bit machine which is emulated on a host 64-bit machine are provided in order to achieve visibility, to an emulated application program, of a 'containing' word stored in the memory of the host machine. A 'LOAD64' instruction loads the emulator memory location representing an emulated 'Q' (supplementary accumulator) register with the 'normal' 36-bits of the containing word. At the same time, the 'upper' 28 bits of the 64-bit containing word is copied into the emulator memory location representing an emulated 'A' (accumulator) register. Thus, the emulated 36-bit machine 'sees' and can examine the 64-bit word in its entirety. A 'Store64' instruction stores the emulated 'Q' register contents into the lower 36-bits of the 64-bit containing word, and at the same time stores the lower 28 bits of the emulated 'A' register contents into the upper 28 bits of the 64-bit containing word.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully