Interleaving input sequences to memory
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Aug 19, 2008
Grant Date -
May 26, 2005
app pub date -
May 13, 2004
filing date -
Nov 26, 2003
priority date (Note) -
In Force
status (Latency Note)
Importance
Loading Importance Indicators... 
Abstract
An interleaver for use with transform processors provides an address generator allowing for implementation using a reduced memory foot print, and permitting interleaving of an input sequence while minimizing latency.
Loading the Abstract Image...
OK
First Claim
Family
Loading Family data...
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully