Page.sub.--EXE erase algorithm for flash memory

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United States of America Patent

PATENT NO 7415646
SERIAL NO

10946812

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Abstract

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Methods of performing a sector erase of flash memory devices incorporating built-in self test circuitry are provided. The present invention employs an interactive verification and sector erase algorithm to verify and repeatedly erase the sector until a portion of the groups of each page of the sector are erased or a first maximum number of erase pulses is achieved. The algorithm further includes a word verification and erase operation that sequentially verifies and erases each word of the sector until each word is erased or a second maximum number of erase pulses is achieved. The second maximum number of erase pulses may be based on a function of the first maximum number of erase pulses. The second maximum number of erase pulses may be input to the sector erase algorithm as a multi-bit code. The second maximum number of erase pulses and conversion of the multi-bit code may be based on a binary multiple of the first maximum number of erase pulses.

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Patent Owner(s)

Patent OwnerAddress
CYPRESS SEMICONDUCTOR CORPORATION198 CHAMPION COURT SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cheah, Ken Cheong Penang, MY 15 335
Hamilton, Darlene San Jose, CA 34 852
Lee, Mimi Santa Clara, CA 6 91

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