Method, system, and circuit for operating a non-volatile memory array
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United States of America Patent
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Sep 2, 2008
Grant Date -
Jun 15, 2006
app pub date -
Jan 9, 2006
filing date -
Jan 31, 2002
priority date (Note) -
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Abstract
A method and a system for operating bits of memory cells in a memory array, the method including applying a first operating pulse to a terminal of a first cell, the first operating pulse is intended to place the first cell into a predefined state; and applying a second operating pulse to a terminal of a second cell in the set, the second operating pulse is intended to place the second cell to the predefined state, and the pulse characteristics of the second operating pulse are a function of the response of the first cell to the first operating pulse.
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