Memory device, use thereof and method for synchronizing a data word
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United States of America Patent
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Sep 2, 2008
Grant Date -
Dec 7, 2006
app pub date -
Apr 27, 2006
filing date -
Apr 27, 2005
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The invention includes a memory device with a register device to which an output of a multiplexer is connected. The input of the multiplexer is connected to a buffer store. In addition, the memory device includes a synchronization circuit having a control output connected to a control input of the multiplexer. A clock signal output of the synchronization circuit is connected to the clock input of the register device. The synchronization circuit generates and outputs a clock signal to the clock signal output derived from a time profile for a signal on a state input and from a signal on a second clock input. In this way, a data word to be stored in the register device is synchronized to a clock signal on the second clock input, so that data errors are avoided during transfer.
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