Memory controller for processor having multiple multithreaded programmable units
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Sep 9, 2008
Grant Date -
Mar 30, 2006
app pub date -
Sep 21, 2005
filing date -
Aug 31, 1999
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A parallel hardware-based multithreaded processor is described. The processor includes a general purpose processor that coordinates system functions and a plurality of microengines that support multiple hardware threads. The processor-also includes a memory control system that has a first memory controller that sorts memory references based on whether the memory references are directed to an even bank or an odd bank of memory and a second memory controller that optimizes memory references based upon whether the memory references are read references or write references.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully