Combined hardware/software assertion checking

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United States of America Patent

PATENT NO 7426705
SERIAL NO

11120041

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Abstract

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Assertion checking is achieved by modifying a given set of assertions to include subsuming assertions that cover one or more of given assertions and also require less logic to implement, by implementing at least the subsuming assertions in functionally reconfigurable circuitry within an integrated circuit, and by checking with an auxiliary tester assertions that each of the firing subsuming assertion replaced.

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Patent Owner(s)

Patent OwnerAddress
DAFCA INC72 NICKERSON ROAD ASHLAND MA 01712

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kolaric, Herbert K Watertown, MA 1 20

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