Memory device with delayed issuance of internal write command
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United States of America Patent
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Oct 14, 2008
Grant Date -
Aug 2, 2007
app pub date -
Apr 9, 2007
filing date -
Oct 10, 1997
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method and apparatus for storing data in a memory device is described. The apparatus is configured to perform the following steps. The method employs a two-step technique which allows the out-of-order completion of read and write operations. When a write operation requires a resource needed for the completion of a read operation, the data being written is stored in a write data buffer in the memory device. The write data is stored in the buffer until a datapath is available to communicate the data to the memory device's memory core. Once the resource is free (or the memory device, or its controller force the write to complete) the data is written to the memory core of the memory device using the now-free datapath.
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