Programming non-volatile memory with improved boosting
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United States of America Patent
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Oct 21, 2008
Grant Date -
Mar 6, 2008
app pub date -
Sep 6, 2006
filing date -
Sep 6, 2006
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Abstract
Non-volatile storage elements are programmed in a manner that reduces program disturb, particularly at the edges storage elements strings, by using modified pass voltages. In particular, during the programming of a selected storage element, an isolation voltage is applied to a storage element proximate to the selected storage element thereby electrically dividing the channel associated with the storage elements into two isolated areas. Additional isolated areas are formed remotely from the selected storage element by applying the isolation voltage to other remote storage elements. The isolated channel regions associated with the storage elements are then boosted with different pass voltages in order to alleviate the effects of program disturb. Thus, a standard pass voltage is applied to storage elements immediately adjacent to the selected storage element, and a lower pass voltage is applied to storage elements remote from the selected storage element. In one preferred embodiment, a higher pass voltage is applied to storage elements immediately adjacent the selected storage element on the side having previously programmed storage elements. These techniques reduce the leakage of charge from adjacent boosted channel regions caused by gate induced drain leakage at the source select line and the drain select line, as well as from isolation word lines, thereby reducing program disturb effects.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| SANDISK TECHNOLOGIES INC | 951 SANDISK DRIVE LEGAL DEP MILPITAS CA 95035 |
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Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Ito, Fumitoshi | Yokohama, JP | 48 | 797 |
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| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
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