US Patent No: 7,440,327

Number of patents in Portfolio can not be more than 2000

Non-volatile storage with reduced power consumption during read operations

Stats

ALSO PUBLISHED AS: 20080266975
ATTORNEY / AGENT: (SPONSORED)
 

Importance

Loading Importance Indicators... loading....

Abstract

A non-volatile storage device in which power consumption is reduced by providing reduced read pass voltages on unselected word lines during a read operation. A programming status of one or more unselected word lines which are after a selected word line on which storage elements are being read is checked to determine whether the unselected word lines contain programmed storage elements. When an unprogrammed word line is identified, reduced read pass voltages are provided on that word line and other word lines which are after that word line in a programming order. The programming status can be determined by a flag stored in the word line, for instance, or by reading the word line at the lowest read state. The unselected word lines which are checked can be predetermined in a set of word lines, or determined adaptively based on a position of the selected word line.

Loading the Abstract Image... loading....

First Claim

Related Publications

Loading Related Publications... loading....

Patent Owner(s)

Patent OwnerAddressTotal Patents
SANDISK TECHNOLOGIES INC.PLANO, TX1506

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mokhlesi, Nima Los Gatos, CA 279 1898
Sekar, Deepak Chandra Atlanta, GA 40 120
So, Hock C Redwood City, CA 44 2218

Cited Art

Patent Info (Count) # Cites Year
 
KABUSHIKI KAISHA TOSHIBA (13)
5,270,969 Electrically programmable nonvolatile semiconductor memory device with nand cell structure 52 1992
5,386,422 Electrically erasable and programmable non-volatile memory system with write-verify controller using two reference levels 138 1994
5,570,315 Multi-state EEPROM having write-verify control circuit 617 1994
5,774,397 Non-volatile semiconductor memory device and method of programming a non-volatile memory cell to a predetermined state 434 1996
6,046,935 Semiconductor device and memory system 592 1999
6,522,583 Nonvolatile semiconductor memory 41 2001
6,522,580 Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states 557 2001
2002/0050,607 Nonvolatile semiconductor memory 7 2001
6,859,395 NAND type flash EEPROM in which sequential programming process is performed by using different intermediate voltages 49 2003
7,009,881 Semiconductor memory device 76 2004
7,054,195 Nonvolatile semiconductor memory 13 2004
7,180,787 Semiconductor memory device 26 2004
2008/0055,985 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE 7 2007
 
SANDISK TECHNOLOGIES INC. (12)
6,222,762 Multi-state memory 678 1997
6,456,528 Selective operation of a multi-state non-volatile memory system in a binary mode 507 2001
6,859,397 Source side self boosting technique for non-volatile memory 223 2003
7,161,833 Self-boosting system for flash memory cells 54 2004
7,170,793 Programming inhibit for non-volatile memory 22 2004
7,020,026 Bitline governed approach for program control of non-volatile memory 37 2004
7,046,568 Memory sensing circuit and method for low voltage operation 126 2004
6,975,537 Source side self boosting technique for non-volatile memory 33 2005
7,196,928 Compensating for coupling during read operations of non-volatile memory 158 2005
7,088,621 Bitline governed approach for coarse/fine programming 40 2005
2007/0279,995 SYSTEM FOR PERFORMING DATA PATTERN SENSITIVITY COMPENSATION USING DIFFERENT VOLTAGE 20 2006
7,342,831 System for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates 60 2006
 
SAMSUNG ELECTRONICS CO., LTD. (3)
5,677,873 Methods of programming flash EEPROM integrated circuit memory devices to prevent inadvertent programming of nondesignated NAND memory cells therein 96 1996
6,987,694 Methods of programming non-volatile semiconductor memory devices including coupling voltages and related devices 51 2003
7,184,308 Flash memory devices and methods for programming the same 20 2004
 
SANDISK CORPORATION (3)
2006/0140,007 Non-volatile memory and method with shared processing for an aggregate of read/write circuits 151 2004
7,023,737 System for programming non-volatile memory with self-adjusting maximum program loop 28 2005
7,170,788 Last-first mode and apparatus for programming of non-volatile memory with reduced program disturb 36 2005
 
SPANSION LLC (2)
5,715,194 Bias scheme of program inhibit for random programming in a nand flash memory 97 1996
5,991,202 Method for reducing program disturb during self-boosting in a NAND flash memory 192 1998
 
MICRON TECHNOLOGY, INC. (1)
7,064,981 NAND string wordline delay reduction 12 2004
 
SHAW INDUSTRIES GROUP, INC. (1)
5,522,580 Removing stains from fixed items 63 1993
 
UNITED MICROELECTRONICS CORP. (1)
7,123,518 Memory device 9 2004

Patent Citation Ranking

Forward Cites

Patent Info (Count) # Cites Year
 
HYNIX SEMICONDUCTOR INC. (1)
8,358,536 Nonvolatile memory device and method with multiple verification pass voltages 0 2010
 
KABUSHIKI KAISHA TOSHIBA (1)
7,916,547 Method for controlling a non-volatile semiconductor memory device 8 2008
 
MICRON TECHNOLOGY, INC. (1)
7,952,936 Program-verify method 0 2009

Maintenance Fees

Fee Large entity fee small entity fee micro entity fee due date
7.5 Year Payment $3600.00 $1800.00 $900.00 Apr 21, 2016
11.5 Year Payment $7400.00 $3700.00 $1850.00 Apr 21, 2020
Fee Large entity fee small entity fee micro entity fee
Surcharge - 7.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge - 11.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge after expiration - Late payment is unavoidable $700.00 $350.00 $175.00
Surcharge after expiration - Late payment is unintentional $1,640.00 $820.00 $410.00