Memory rewind and reconstruction for hardware emulator
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United States of America Patent
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Oct 21, 2008
Grant Date -
Jul 29, 2004
app pub date -
Feb 24, 2003
filing date -
Jan 23, 2003
priority date (Note) -
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Abstract
A method and apparatus for debugging circuit designs having random access memory therein. The circuit design is emulated on a hardware logic emulator. The RAM emulated by the emulator can be rewound to a previous state, and then replayed. The RAM emulated by the emulator can also be reconstructed to a state the RAM maintained at some point during a trace window.
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