US Patent No: 7,443,215
Number of patents in Portfolio can not be more than 2000
Methods and apparatus to increase the resolution of a clock synthesis circuit that uses feedback interpolation
Stats
-
Oct 28, 2008
Issued date -
Nov 9, 2007
filing date -
11/938,164
serial no -
In Force
status
Importance
Loading Importance Indicators...
Abstract
A frequency synthesis circuit includes a phase locked loop and an interpolator circuit. The phase locked loop circuit receives a reference clock and a feedback clock and generates an output clock with a frequency based on the reference clock and the feedback clock. An interpolator circuit is coupled in the feedback path of the phase locked loop circuit. An interpolator control circuit generates an interpolator control word that specifies a variable time delay for the interpolator circuit. The interpolator circuit receives the output clock, and generates the feedback clock by introducing a variable time delay in the output clock in accordance with the interpolator control word. The time variable delay varies the frequency of the output circuit. Embodiments for frequency synthesis circuits that include a spread spectrum frequency clock generator, frequency modulators, and a fixed frequency clock generator circuit are disclosed.
Loading the Abstract Image...
First Claim
Related Publications
Loading Related Publications...
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art
| Patent Info | (Count) | # Cites | Year |
|---|---|---|---|
|
|
|||
| 6,226,332 Multi-pair transceiver decoder system with low computation slicer | 42 | 1999 | |
| 7,162,002 Phase-interpolator based PLL frequency synthesizer | 18 | 2002 | |
| 2003/0091,139 System and method for adjusting phase offsets | 7 | 2002 | |
| 7,161,443 Temperature compensated crystal oscillator | 9 | 2004 | |
|
|
|||
| 5,471,162 High speed transient sampler | 141 | 1992 | |
| 5,519,342 Transient digitizer with displacement current samplers | 46 | 1994 | |
|
|
|||
| 4,314,212 Transient data recorder systems | 7 | 1979 | |
| 4,586,010 Charge splitting sampler systems | 7 | 1982 | |
|
|
|||
| 6,901,126 Time division multiplex data recovery system using close loop phase and delay locked loop | 35 | 2000 | |
| 6,466,098 Analogue-controlled phase interpolator | 24 | 2001 | |
|
|
|||
| 7,089,444 Clock and data recovery circuits | 24 | 2003 | |
|
|
|||
| 7,317,360 Fractional-N synthesizer system and method | 8 | 2006 | |
|
|
|||
| 6,828,864 Low-jitter loop filter for a phase-locked loop system | 14 | 2003 | |
|
|
|||
| 5,712,882 Signal distribution system | 18 | 1996 | |
|
|
|||
| 6,861,546 Method of purifying alkoxysilanes | 2 | 2004 | |
|
|
|||
| 6,570,946 One-hot decoded phase shift prescaler | 23 | 1999 | |
|
|
|||
| 2003/0161,430 Clock recovery circuitry | 18 | 2002 | |
|
|
|||
| 6,167,467 Information reception and recording circuit | 7 | 1999 | |
|
|
|||
| 6,927,611 Semidigital delay-locked loop using an analog-based finite state machine | 16 | 2003 | |
|
|
|||
| 6,317,008 Clock recovery using an injection tuned resonant circuit | 38 | 1999 | |
|
|
|||
| 7,088,534 Disk synchronous write | 17 | 2003 | |
|
|
|||
| 5,559,474 Frequency synthesizer with controllable loop filter | 30 | 1995 | |
|
|
|||
| 6,967,513 Phase-locked loop filter with out of band rejection in low bandwidth mode | 26 | 2004 | |
|
|
|||
| 6,674,824 Method and circuitry for controlling a phase-locked loop by analog and digital signals | 15 | 1999 | |
|
|
|||
| 6,285,726 10/100 mb clock recovery architecture for switches, repeaters and multi-physical layer ports | 58 | 1998 | |
|
|
|||
| 7,323,916 Methods and apparatus for generating multiple clocks using feedback interpolation | 22 | 2005 | |
|
|
|||
| 5,124,670 Frequency synthesizers with fractional division | 20 | 1991 | |
|
|
|||
| 6,125,157 Delay-locked loop circuitry for clock delay adjustment | 183 | 1997 | |
|
|
|||
| 7,054,404 Clock control method, frequency dividing circuit and PLL circuit | 11 | 2002 | |
|
|
|||
| 6,565,157 Molded foam spring seat | 10 | 2001 | |
|
|
|||
| 2003/0081,709 Single-ended IO with dynamic synchronous deskewing architecture | 20 | 2001 | |
|
|
|||
| 6,693,496 Method and system for low power, low jitter, wide range, self-adaptive multi-frequency phase locked loop | 18 | 2002 | |
|
|
|||
| 4,621,242 R.F. impedance match control system | 26 | 1984 | |
|
|
|||
| 6,242,990 Quadrature phase shift keyed/bi-phase shift keyed modulator | 8 | 1999 | |
|
|
|||
| 4,507,629 Microwave phase shifter | 9 | 1983 | |
|
|
|||
| 7,078,946 Analog PLL with switched capacitor resampling filter | 11 | 2002 | |
Patent Citation Ranking
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Apr 28, 2016 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Apr 28, 2020 |
| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge - 7.5 year - Late payment within 6 months | $160.00 | $80.00 | $40.00 |
| Surcharge - 11.5 year - Late payment within 6 months | $160.00 | $80.00 | $40.00 |
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |