Visualizing hardware cost in high level modeling systems
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United States of America Patent
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Oct 28, 2008
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N/A
app pub date -
Aug 3, 2005
filing date -
Aug 3, 2005
priority date (Note) -
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Abstract
Within a high level modeling system (HLMS), a method of visualizing a circuit design can include identifying the circuit design and reading hardware cost information for the circuit design. The method also can include presenting a graphical representation of the circuit design having at least one visual characteristic which can be varied according to the hardware cost information.
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