Method for error reduction in lithography
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United States of America Patent
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Oct 28, 2008
Grant Date -
Dec 30, 2004
app pub date -
Apr 20, 2004
filing date -
May 20, 1999
priority date (Note) -
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status (Latency Note)
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Abstract
The present invention relates to a method and a system for predicting and/or measuring and correcting geometrical errors in lithography using masks, such as large-area photomasks or reticles, and exposure stations, such as wafer steppers or projection aligners, printing the pattern of said masks on a workpiece, such as a display panel or a semiconductor wafer. A method to compensate for process variations when printing a pattern on a workpiece, including determining a two-dimensional CD profile in said pattern printed on said workpiece, generating a two-dimensional compensation file to equalize fluctuations in said two-dimensional CD-profile, and patterning a workpiece with said two-dimensional compensation file.
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