Method for forming multi-layer embedded capacitors on a printed circuit board
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United States of America Patent
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-
Nov 4, 2008
Grant Date -
Sep 13, 2007
app pub date -
Mar 10, 2006
filing date -
Mar 10, 2006
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A method for forming embedded capacitors on a printed circuit board is disclosed. The capacitor is formed on the printed circuit board by a depositing a first dielectric layer over one or more electrodes situated on the PCB. Another electrode is formed on top of the first dielectric layer and a second dielectric layer is deposited on top of that electrode. A third electrode is formed on top of the second dielectric layer. The two dielectric layers are abrasively delineated in a single step by a method such as sand blasting to define portions of the first and second dielectric layers to create a multilayer capacitive structure.
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