Pulse generation circuit
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United States of America Patent
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Nov 4, 2008
Grant Date -
May 11, 2006
app pub date -
Dec 29, 2005
filing date -
Aug 13, 2003
priority date (Note) -
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status (Latency Note)
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Abstract
Pulse generation circuit has a P-MOS transistor having a drain electrode connected to a first power source; a first N-MOS transistor having a drain electrode connected to the source electrode of the P-MOS transistor; a second N-MOS transistor having a drain electrode connected to the source electrode of the first N-MOS transistor, a gate electrode receiving an input pulse signal, and a source electrode connected to the second power source; a delay circuit having an input terminal connected to the source electrode of the P-MOS transistor and the drain electrode of the first N-MOS transistor and an output terminal connected to gate electrode of the P-MOS transistor and gate electrode of the first N-MOS transistor; an inverter input connected to the source electrode of the P-MOS transistor and the drain electrode of the second N-MOS transistor for outputting a generated pulse; and a keeper keeping voltage level to the inverter.
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