Method and apparatus to reduce internal circuit errors in a multi-bit delta-sigma modulator
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Nov 4, 2008
Grant Date -
May 1, 2008
app pub date -
Sep 17, 2007
filing date -
Oct 27, 2006
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An N-bit delta-sigma modulator reduces circuit errors associated with an internal N-bit digital-to-analog converter by replacing the N-bit digital-to-analog converter with a digital feedback circuit comprising a ternary digital-to-analog converter and an (N-1)-bit digital-to-analog converter. The internal N-bit digital-to-analog converter is typically used to generate a global feedback signal that is provided to a first summation circuit. To provide an equivalent function but with better noise transfer characteristics, the digital feedback circuit generates two feedback signals. The ternary digital-to-analog converter is part of a first feedback path that generates a first feedback signal for the first summation circuit, and the (N-1)-bit digital-to-analog converter is part of a second feedback path that generates a second feedback signal for the first summation circuit or a subsequent summation circuit.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully