Signal flow driven circuit analysis and partitioning technique

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United States of America Patent

PATENT NO 7448003
APP PUB NO 20070006103A1
SERIAL NO

11452542

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Abstract

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A method for generating a layout for an analog circuit design is provided. The method includes tracing a signal flow through a circuit netlist, and partitioning the circuit netlist into a digital portion and an analog portion. A signal flow is defined through the analog portion of the circuit netlist. A system for generating a layout for an analog circuit design is also included.

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Patent Owner(s)

Patent OwnerAddress
SYNOPSYS INC675 ALMANOR AVENUE SUNNYVALE CA 94085

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Wu, Yuping Beijing, CN 35 110
Zhang, Pengfei Fremont, CA 168 817
Zhang, Xisheng Sunnyvale, CA 11 107

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