Method of fabricating a high-layer-count backplane

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7448132
APP PUB NO 20070039171A1
SERIAL NO

11537754

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

The disclosed board fabrication techniques and design features enable the construction of a reliable, high-layer-count, and economical backplane for routers and the like that require a large number of signaling paths across the backplane at speeds of 2.5 Gbps or greater, as well as distribution of significant amounts of power to router components. The disclosed techniques and features allow relatively thick (e.g., three- or four-ounce copper) power distribution planes to be combined with large numbers of high-speed signaling layers in a common backplane. Using traditional techniques, such a construction would not be possible because of the number of layers required and the thickness of the power distribution layers. The disclosed embodiments use novel layer arrangements, material selection, processing techniques, and panel features to produce the desired high-speed layers and low- noise high-power distribution layers in a single mechanically stable board.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
DELL MARKETING CORPORATIONONE DELL WAY ROUND ROCK TX 78682

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Goergen, Joel R San Jose, CA 43 735

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation