Trimming of analog voltages in flash memory devices
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United States of America Patent
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Nov 25, 2008
Grant Date -
Jul 12, 2007
app pub date -
Jan 12, 2006
filing date -
Jan 12, 2006
priority date (Note) -
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Abstract
A flash memory device of the multi-level cell (MLC) type, in which control gate voltages in read and programming operations and a bandgap reference voltage source are trimmable from external terminals, is disclosed. In a special test mode, control gate voltages can be applied to a selected programmed memory cell so that the threshold voltage of the cell can be sensed. A digital-to-analog converter (DAC) use for programming and a second read/verify DAC apply varying analog voltages and are sequentially used to verify the programming of an associated set of memory cells in this special test mode, with the DAC input values that provide the closest result selected for use in normal operation. These DAC's are dependent on the value of a reference source that my also be trimmed.
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