Operating array cells with matched reference cells
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United States of America Patent
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Nov 25, 2008
Grant Date -
Jun 14, 2007
app pub date -
Oct 16, 2006
filing date -
Sep 16, 2003
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Abstract
A method for reading a bit of a memory cell in a non-volatile memory (NVM) cell array, the method comprising providing a memory cell comprising a bit to be read and at least one other bit not to be read, and reading the bit to be read with respect to a multi-bit reference cell, the reference cell comprising a first bit at a first non-ground programmed state and a second bit at a second non-ground programmed state. Compared with the prior art, the present invention may enable achieving an improved sensing accuracy together with improved read disturb immunity.
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