Stack type semiconductor package module utilizing solder coated stacking protrusions and method for manufacturing the same
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United States of America Patent
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Dec 9, 2008
Grant Date -
Mar 6, 2008
app pub date -
Oct 30, 2007
filing date -
Sep 7, 2005
priority date (Note) -
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status (Latency Note)
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Abstract
The stack type semiconductor package module includes a lower semiconductor package having a main substrate, a chip mounted on the main substrate and electrically connected to the main substrate through a wire. An epoxy molding compound (EMC) is provided on the main substrate to cover the chip and the wire. Contact holes are formed in the EMC. A sub-substrate having protrusions coated with solder is connected to the lower semiconductor package by inserting the solder coated protrusions into the contact holes. Heat is applied to the protrusions, and the molten solder solidifies inside the contact holes. An upper semiconductor package having substantially identical structure as the lower package is then stacked on the sub-substrate.
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