Method for fabricating semiconductor devices using strained silicon bearing material

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United States of America Patent

PATENT NO 7462526
APP PUB NO 20050227425A1
SERIAL NO

11149783

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Abstract

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A method of manufacturing an integrated circuit on semiconductor substrates, e.g., silicon wafer. The method includes providing a semiconductor substrate characterized by a first lattice with a first structure and a first spacing. In a specific embodiment, the semiconductor substrate has an overlying film of material with a second lattice with a second structure and a second spacing, the second spacing placing the film of material in a strain mode characterized by a first tensile and/or compressive mode along a single film surface crystal axis across a first portion of the film of material relative to the semiconductor substrate with the first structure and the first spacing. The method patterns a predetermined region of the first portion of the film of material to cause the first tensile and/or compressive mode in the first portion of the film of material to change to a second tensile and/or compressive mode in a resulting patterned portion of the first portion of the film of material. In a preferred embodiment, the patterns are made using a masking and etching process.

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Patent Owner(s)

Patent OwnerAddress
SILICON GENESIS CORPORATIONSAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Henley, Francois J Aptos, CA 178 9676

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