Phase and frequency drift and jitter compensation in a distributed telecommunications switch
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United States of America Patent
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-
Dec 9, 2008
Grant Date -
May 15, 2003
app pub date -
May 24, 2002
filing date -
Nov 21, 2000
priority date (Note) -
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status (Latency Note)
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Abstract
Methods and apparatus for phase and frequency drift and jitter compensation in a distributed switch which carries both TDM and packet data are disclosed. The methods include the insertion of programmable fill times at different stages of the switch to allow buffers to fill, driving service processors (line cards) with different clocks and synchronizing the service processors (line cards) to the switch fabric, providing redundant switch fabric clocks and methods for automatically substituting one of the redundant clocks for a clock which fails, providing redundant switch fabrics each having a different clock and methods for automatically substituting one switch fabric for the other when one fails. The apparatus of the invention includes a plurality of service processors (line cards), switch elements and clock generators. An exemplary clock generator based on an FPGA is also disclosed.
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