Method for producing a packaged integrated circuit
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United States of America Patent
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Dec 16, 2008
Grant Date -
Mar 23, 2006
app pub date -
Oct 27, 2003
filing date -
Oct 25, 2002
priority date (Note) -
In Force
status (Latency Note)
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Abstract
There is described a method for producing a packaged integrated circuit. The method comprises a first step of building an integrated circuit having a micro-structure suspended above a micro-cavity, and having a heating element on the micro-structure capable of heating itself and its immediate surroundings. A layer of protective material is then deposited on said micro-structure such that at least a top surface of the micro-structure and an opening of the micro-cavity is covered, wherein the protective material is in a solid state at room temperature and can protect the micro-structure during silicon wafer dicing procedures and subsequent packaging. The integrated circuit is packaged and an electric current is passed through the heating element such that a portion of the protective material is removed and an unobstructed volume is provided above and below the micro-structure.
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