Look-up table structure with embedded carry logic
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United States of America Patent
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Dec 16, 2008
Grant Date -
Mar 20, 2008
app pub date -
Nov 19, 2007
filing date -
Nov 25, 2003
priority date (Note) -
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Abstract
A configurable look up table (LUT) structure of an integrated circuit comprising: a first, a second and a third intermediate LUT stage, each of the LUT stages comprising one or more inputs and an output, wherein: the output of first intermediate LUT stage is coupled to an input of the second and third intermediate LUT stages; and the second intermediate LUT stage generates an arithmetic function of two bits and a carry-in signal received as inputs to the LUT structure; and the third intermediate LUT stage generates a carry-out signal.
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