Mathematical circuit with dynamic rounding
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United States of America Patent
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Dec 16, 2008
Grant Date -
Jun 30, 2005
app pub date -
Dec 21, 2004
filing date -
Dec 29, 2003
priority date (Note) -
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status (Latency Note)
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Abstract
Described are mathematical circuits that perform flexible rounding schemes. The circuits require few additional resources and can be adjusted dynamically to change the number of bits involved in the rounding. In one embodiment, a DSP circuit stores a rounding constant selected from the group of binary numbers 2.sup.(M-1) and 2.sup.(M-1)-1, calculates a correction factor, and sums the rounding constant, the correction factor, and a data item to obtain a rounded data item.
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