Electronic components such as thin array plastic packages and process for fabricating same
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United States of America Patent
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Jan 27, 2009
Grant Date -
N/A
app pub date -
Mar 3, 2005
filing date -
Jun 10, 1998
priority date (Note) -
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status (Latency Note)
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Abstract
A process for fabricating an integrated circuit package includes establishing a plating mask on a first surface of a metal carrier. The plating mask defines a plurality of components including a die attach pad, at least one row of contact pads and at least one additional electronic component. A plurality of metallic layers is deposited on exposed portions of the first surface of the metal carrier. The plating mask is stripped from the metal carrier, leaving the plurality of metallic layers in the form of the plurality of components. A semiconductor die is mounted to die attach pad and pads of the semiconductor die are electrically connected to ones of the contact pads and to the additional electronic component. The first surface of the metal carrier is overmolded to encapsulate the plurality of components and the semiconductor die and the metal carrier is etched away.
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