Efficient implementation of low power mode in digital subscriber line (DSL) transceivers

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United States of America Patent

PATENT NO 7486608
SERIAL NO

10714354

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Abstract

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Efficient implementation techniques of a low power mode, (i.e. L2 mode for ADSL2) for DSL transceivers are described. The techniques save memory space and reduce implementation complexity. A constellation mapper in a DSL transmitter determines the number of bits to be retrieved for an ith sub-carrier in the low power mode based on the number of bits allocated for this same sub-carrier in a normal transmission mode, (e.g. L0 mode in ADSL2) and a bit allocation threshold T. A constellation demapper in a DSL receiver determines the number of bits used for an ith sub-carrier in the low power mode based on the bit tables for the L0 mode and the bit threshold T.

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Patent Owner(s)

  • IKANOS COMMUNICATIONS, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hashemi, Mark Sunnyvale , US 2 46
Long, Guozhu Newark , US 69 1146
O'Toole, Anthony J P Los Gatos , US 8 509

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