High performance IP processor
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United States of America Patent
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Feb 3, 2009
Issued Date -
N/A
app pub date -
Jun 10, 2003
filing date -
Jun 11, 2002
priority date (Note) -
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Abstract
. A set of engines may perform pass-through packet classification, policy processing and/or security processing enabling packet streaming through the architecture at nearly the full line rate. A scheduler schedules packets to packet processors for processing. An internal memory or local session database cache stores a session information database for a certain number of active sessions. The session information that is not in the internal memory is stored and retrieved to/from an additional memory.
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