Hardware implementation of the secure hash standard
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United States of America Patent
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Feb 10, 2009
Grant Date -
Jul 17, 2003
app pub date -
Mar 5, 2002
filing date -
Mar 22, 2001
priority date (Note) -
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Abstract
An integrated circuit for implementing the secure hash algorithm is provided. According to one aspect of the integrated circuit, the integrated circuit includes a data path and a controller controlling operation of the data path. According to another aspect of the integrated circuit, the data path is capable of handling each round of processing reiteratively. The controller further includes an address control module and a finite state machine.
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