Yield-enhancing methods of providing a family of scaled integrated circuits
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United States of America Patent
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Feb 17, 2009
Grant Date -
N/A
app pub date -
Jan 17, 2006
filing date -
Nov 1, 2005
priority date (Note) -
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Abstract
An integrated circuit die (e.g., a programmable logic device (PLD) die) is manufactured that has the capability of being configured as at least two differently-sized family members. The IC die is tested prior to packaging. If a first portion of the IC die is fully functional, but a second portion includes a localized defect, then the IC die is packaged with a product selection code that configures the IC die to operate as only the first portion of the die. The second portion of the die is deliberately rendered non-operational. Therefore, the IC die can still be sold as a fully functional packaged IC.
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