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• 15 United States
• 10 France
• 8 Japan
• 7 China
• 5 Korea
• 2 Other

Patent Owner(s)

Patent Owner	Address
U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT	100 WALL STREET SUITE 1600 NEW YORK NY 10005

International Classification(s)

• H01L:SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICE....

• [Classification Symbol]

• [Patents Count]

Inventor(s)

Inventor Name	Address	# of filed Patents	Total Citations
Forbes, Leonard	Corvallis , US	1221	64037

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Maintenance Fees

Fee	Large entity fee	small entity fee	micro entity fee	due date

Fee	Large entity fee	small entity fee	micro entity fee
Surcharge after expiration - Late payment is unavoidable	$700.00	$350.00	$175.00
Surcharge after expiration - Late payment is unintentional	$1,640.00	$820.00	$410.00

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
February 17, 2009	US,7491608,B2   US7491608B2	GRANTED PATENT AS SECOND PUBLICATION
November 30, 2006	US,20060270160,A1   US20060270160A1	FIRST PUBLISHED PATENT APPLICATION

Full Text

US Patent No: 7491608

Vertical transistor with horizontal gate layers

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