Semiconductor structure for isolating integrated circuits of various operating voltages
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United States of America Patent
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Mar 3, 2009
Grant Date -
Oct 11, 2007
app pub date -
Nov 12, 2005
filing date -
Nov 12, 2004
priority date (Note) -
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Abstract
A semiconductor structure for isolating a first circuit and a second circuit of various operating voltages includes a first isolation ring surrounding the first and second circuits on a semiconductor substrate. A buried layer continuously extending underneath the first and second circuits is formed on the semiconductor substrate, wherein the buried layer interfaces with the first isolation ring for isolating the first and second circuits from a backside bias of the semiconductor substrate. An ion enhanced isolation layer is interposed between the buried layer and well regions on which devices of the first and second circuits are formed, wherein the ion enhanced isolation layer is doped with impurities of a polarity type different from that of the buried layer.
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