Memory with resistance memory cell and evaluation circuit
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United States of America Patent
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Mar 3, 2009
Grant Date -
Jun 28, 2007
app pub date -
Feb 7, 2007
filing date -
Sep 30, 2004
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A memory circuit comprising a memory cell which has a resistance memory element and is connected between a ground terminal and a capacitor has a reference memory cell with a reference resistor which is connected between the ground terminal and a reference capacitor, in which case, during the reading operation of the memory cell, the memory cell and the reference memory cell are switched on in order to charge or discharge the capacitor and the reference capacitor, and an evaluation device evaluates the difference between the electrical potentials of the capacitor and the reference capacitor at a predetermined instant after the switching-on of the memory cell and the reference memory cell.
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