System and method using embedded microprocessor as a node in an adaptable computing machine
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United States of America Patent
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Mar 10, 2009
Grant Date -
Jul 22, 2004
app pub date -
Sep 29, 2003
filing date -
Sep 30, 2002
priority date (Note) -
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Abstract
The present invention provides an adaptive computing engine (ACE) that includes processing nodes having different capabilities such as arithmetic nodes, bit-manipulation nodes, finite state machine nodes, input/output nodes and a programmable scalar node (PSN). In accordance with one embodiment of the present invention, a common architecture is adaptable to function in either a kernel node, or k-node, or as general purpose RISC node. The k-node acts as a system controller responsible for adapting other nodes to perform selected functions. As a RISC node, the PSN is configured to perform computationally intensive applications such as signal processing.
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