Fault tolerant asynchronous circuits
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United States of America Patent
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Mar 17, 2009
Grant Date -
Nov 1, 2007
app pub date -
Apr 25, 2007
filing date -
Apr 27, 2006
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Abstract
New and improved methods and circuit designs for asynchronous circuits that are tolerant to transient faults, for example of the type introduced through radiation or, more broadly, single-event effects. SEE-tolerant configurations are shown and described for combinational logic circuits, state-holding logic circuits and SRAM memory circuits.
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