Multi-thread peripheral processing using dedicated peripheral bus

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United States of America Patent

PATENT NO 7512724
SERIAL NO

09715772

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Abstract

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One embodiment of the present invention performs peripheral operations in a multi-thread processor. A peripheral bus is coupled to a peripheral unit to transfer peripheral information including a command message specifying a peripheral operation. A processing slice is coupled to the peripheral bus to execute a plurality of threads. The plurality of threads includes a first thread sending the command message to the peripheral unit.

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Patent Owner(s)

Patent OwnerAddress
UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE NAVY THECHIEF OF NAVAL RESEARCH OF OFFICE OF COUNSEL (ATTN CODE OOCCIP) BALLSTON TOWER ONE 800 NORTH QUINCY STREET ARLINGTON VA 22217

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dennis, Jack B Belmont, US 9 279
Sandbote, Sam B Reston, US 11 210

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