Checkpointing user design states in a configurable IC
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United States of America Patent
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Mar 31, 2009
Grant Date -
Sep 11, 2008
app pub date -
Mar 13, 2006
filing date -
Jul 15, 2005
priority date (Note) -
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status (Latency Note)
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Abstract
Some embodiments provide a configurable integrated circuit (IC) that has several configurable circuits and several user design state (UDS) circuits. The UDS circuits store user-design state values. The configurable IC also includes a debug network communicatively coupled to the UDS circuits. The debug network is for retrieving the user-design state values of several UDS circuits at various stoppages of the operation of the IC without retrieving configuration data that is used to configure the configurable circuits of the IC. The retrieved user-design state values at each stoppage are used as the checkpointed state of the IC while debugging the IC. In some embodiments, the debug network allows the checkpointing of only certain portions of the configurable IC.
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