Semiconductor device
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United States of America Patent
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Apr 21, 2009
Grant Date -
Feb 23, 2006
app pub date -
Dec 27, 2004
filing date -
Aug 17, 2004
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An n-type embedded layer is formed in an N-LV region of a SRAM cell region after an element isolation insulating film is formed on a p-type Si substrate. Thereafter, a p-well and an n-well are formed. In formation of a channel-doped layer, ion implantation is also performed into the N-LV region of the SRAM cell region in parallel with ion implantation into an N-LV of a logic circuit region. Ion-implantation is further performed into the N-LV region of the SRAM cell region in parallel with ion implantation into an N-MV of an I/O region.
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