Compact ISA-bus interface
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United States of America Patent
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Apr 21, 2009
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N/A
app pub date -
Aug 22, 2006
filing date -
Feb 6, 1996
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Abstract
An I/O interface, compatible with industry standards, for interfacing a host to a peripheral device. The interface includes a clock signal, a bus, an address latch enable signal, a peripheral device ready signal, a command signal, a device selected backoff signal, and a reset signal, resulting in an I/O interface capable of ISA-compatible operation with only 22 pins. Address, data, command, interrupt request, and DMA request information are communicated between the host and the peripheral device via a single bus by multiplexing the information on the bus using phasing techniques.
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