Integrated circuit stacking system and method

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7524703
APP PUB NO 20060008945A1
SERIAL NO

11221597

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present invention stacks integrated circuits (ICs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred embodiment in accordance with the invention, a form standard provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. In a preferred embodiment, the form standard will be devised of heat transference material such as copper to improve thermal performance. In an alternative embodiment, the form standard may include a heat spreader portion with mounting feet. In a preferred embodiment of the memory addressing system, a high speed switching system selects a data line associated with each level of a stacked module to reduce the loading effect upon data signals in memory access.

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Patent Owner(s)

  • TAMIRAS PER PTE. LTD., LLC

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cady, James W Austin, US 60 1942
Roper, David L Austin, US 43 806
Wehrly,, Jr James Douglas Austin, US 27 103
Wilder, James Austin, US 41 839

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