Programming method for NAND flash
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United States of America Patent
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Apr 28, 2009
Grant Date -
Dec 20, 2007
app pub date -
Jun 14, 2006
filing date -
Jun 14, 2006
priority date (Note) -
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Abstract
A NAND architecture non-volatile memory device and programming process is described that programs the various cells of strings of non-volatile memory cells utilizing a drain-side self boost, modified drain-side self boost or local self boost process that increases the pass voltage (Vpass_high) on a word line on the source line side of a memory cells selected for programming to boost the voltage on the source of the adjacent blocking cell of the string. This drives the adjacent blocking cell further into cutoff and increases boosting by decreasing channel leakage to the source line during programming.
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