Generalized interlocked register cell (GICE)
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United States of America Patent
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May 5, 2009
Grant Date -
Oct 2, 2008
app pub date -
Mar 28, 2007
filing date -
Mar 28, 2007
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Abstract
A memory element which includes a family of fault-tolerant storage elements using complementary metal-oxide-semiconductor (CMOS) technology is provided. The memory element provides arbitrary levels of redundancy, allowing the tolerance of multiple single event upsets due to particle hits. The memory element may be used in memory arrays such as caches and register files, and clocked registers and latches found in data path and control structures.
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