Method and apparatus for improved computer load and store operations

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO

7529907

APP PUB NO

20080040577A1

SERIAL NO

11876442

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

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Abstract

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Load and store operations in computer systems are extended to provide for Stream Load and Store and Masked Load and Store. In Stream operations a CPU executes a Stream instruction that indicates by appropriate arguments a first address in memory or a first register in a register file from whence to begin reading data entities, and a first address or register from whence to begin storing the entities, and a number of entities to be read and written. In Masked Load and Masked Store operations stored masks are used to indicate patterns relative to first addresses and registers for loading and storing. Bit-string vector methods are taught for masks.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
ARM FINANCE OVERSEAS LIMITEDCAMBRIDGE, GB266

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Melvin, Stephen San Francisco, US 24 319
Musoll, Enrique San Jose, US 39 375
Nemirovsky, Mario D Saratoga, US 33 877
Sankar, Narendra Campbell, US 28 615

Cited Art Landscape

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* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (3)
8271809 On-chip power proxy based architecture 0 2009
8650413 On-chip power proxy based architecture 0 2010
* 2010/0268,930 ON-CHIP POWER PROXY BASED ARCHITECTURE 9 2010
 
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (1)
* 8819348 Address masking between users 1 2006
 
INTEL CORPORATION (2)
* 2009/0172,348 METHODS, APPARATUS, AND INSTRUCTIONS FOR PROCESSING VECTOR DATA 27 2007
9501276 Instructions and logic to vectorize conditional loops 0 2012
 
SCHWEGMAN, LUNDBERG & WOESSNER, P.A. (1)
9514069 Enhanced computer processor and memory management architecture 0 2013
 
BROADCOM CORPORATION (2)
* 7921263 System and method for performing masked store operations in a processor 2 2006
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* Cited By Examiner

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