Runtime reconfiguration of reconfigurable circuits

United States of America Patent

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May 5, 2009
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Dec 6, 2007
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Aug 17, 2007
filing date
Nov 23, 2005

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Abstract

A reconfigurable circuit having primary function blocks with runtime built-in self-test (BIST) circuitry, one or more redundant function blocks and runtime reconfiguration logic is described herein.

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Patent Owner	Address
META SYSTEMS	13-15 RUE JEANNE BRACONNIER - IMMEUBLE LE PASTEUR MEUDON LA FORET 92360

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Inventor Name	Address	# of filed Patents	Total Citations
Reblewski, Frederic	Paris, FR	40	925

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Runtime reconfiguration of reconfigurable circuits

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United States of America Patent

11840853

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PATENT NO	7529998
APP PUB NO	20070283190A1
SERIAL NO	11840853
DOCKET NO

US Family Size	Non-US Coverage
Patent Longevity	Forward Citations

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
May 05, 2009	US,7529998,B2 US7529998B2	GRANTED PATENT AS SECOND PUBLICATION
December 06, 2007	US,20070283190,A1 US20070283190A1	FIRST PUBLISHED PATENT APPLICATION

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11840853

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